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Author Topic: Internal RAM questions  (Read 4137 times)
LD
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« on: July 09, 2015, 02:23:58 AM »

I know we can use some of the stack bytes for other uses, if we know how many levels deep the subroutines goes.
But how about the alternative registers? (18h-1Fh) I see some bios instruction (Init) set them (sel RB1) but I don't know exactly why.
I wish I could use them as regular RAM.

And how exactly the byte 03Eh (Clock) works? It seems it increases every frame but not all byte...
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gertk
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« Reply #1 on: July 09, 2015, 06:16:56 AM »

Hi LD,

You can use these locations as regular ram, use an index register R0 or R1 and set the offset.
The register bank switching is useful to quickly switch(save) registers in for example an interrupt.

Check out the programming threads on this forum, like:

http://videopac.nl/forum/index.php?topic=2001.0

and

http://www.guttenbrunner.com/videopac/

also this is still online:

http://www.sharpmz.org/download/8048.pdf

a complete internal rom source is available here:

http://atarihq.com/danb/files/o2romsrc.txt

Here you will find this:

Code:
001a : a5        clr f1                         ; Set F1
001b : b5        cpl f1
001c : b9 a2     mov r1,a2                      ; R1 = $A2 (Collision)
001e : b8 3d     mov r0,3d                      ; R0 = $3D ?
0020 : 81        movx a,@ r1                    ; A = Collision Register
0021 : a0        mov @ r0,a                     ; put in R$3D
0022 : 18        inc r0                         ; increment R0 (now $3E)
0023 : 10        inc @ r0                       ; increment R$3E (Clock)
0024 : f0        mov a,@ r0                     
0025 : 53 3f     anl a,3f                       ; mask $3E with 00111111
0027 : d3 3c     xrl a,3c                       ; zero now if $3E was 60(dec)
0029 : 96 2f     jnz,2f                         ; if non zero skip
002b : f0        mov a,@ r0                     ; wrap it round back to zero
002c : 53 c0     anl a,c0
002e : a0        mov @ r0,a

The Clock counts up to 60 seconds and is then reset to zero.

Happy programming!
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Rene_G7400
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« Reply #2 on: July 09, 2015, 09:12:35 AM »

Generally register bank RB0 is used for the interrupt routines, and RB1 for the rest of the code.

An updated version of "O2romsrc" can be found here:
http://home.kpn.nl/rene_g7400/vp_info/o2romsrc.txt
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LD
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« Reply #3 on: July 09, 2015, 02:47:52 PM »

Thanks for the links! I'll read them later.
Quote
The Clock counts up to 60 seconds and is then reset to zero.
So it changes to 60 frames in NTSC machines and to 50 in PAL machines? I mean, there are different code for each machine?

And the last byte 03F? How it works?

Quote
Generally register bank RB0 is used for the interrupt routines, and RB1 for the rest of the code.
I see... Probably have one or two unused registers (in a quick read, I think R3 and R4) but it's too bad I cannot use these bytes.
Internal RAM is too short!
« Last Edit: July 09, 2015, 02:55:10 PM by LD » Logged
Rene_G7400
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« Reply #4 on: July 09, 2015, 04:14:02 PM »

So it changes to 60 frames in NTSC machines and to 50 in PAL machines? I mean, there are different code for each machine?

No, the code is the same for NTSC and PAL consoles, so the clock runs too slow on PAL consoles

Probably have one or two unused registers (in a quick read, I think R3 and R4) but it's too bad I cannot use these bytes.
Internal RAM is too short!

R3 and R4 of RB0 are used by the sound routine.

You'll need to use external RAM if internal RAM is not large enough.

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LD
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« Reply #5 on: July 10, 2015, 12:37:14 AM »

Yeah but you know, the internal RAM is more flexible.
Too bad the clock is not fixed for PAL machines, what cost to change 1 byte in the bios?
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Rene_G7400
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« Reply #6 on: July 10, 2015, 09:28:02 AM »

Too bad the clock is not fixed for PAL machines, what cost to change 1 byte in the bios?

Games run slower on PAL consoles, so for fair competition I think it's better that the clock runs slower too.
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LD
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« Reply #7 on: July 10, 2015, 05:14:01 PM »

Where can I find information about byte 3F?
I think it's related to video interrupts?
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Rene_G7400
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« Reply #8 on: July 12, 2015, 04:19:46 AM »

Check the vsync interrupt routine in O2romsrc at byte 002fh: bit 7 is a flag for exram to VDC copy (see also 0132h), bit 6 is a sound flag (see also 01a2h).
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LD
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« Reply #9 on: July 12, 2015, 02:42:26 PM »

Ok.

Thanks!
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